Senior Physical Design Lead Engineer Job Openings In Adeptchips With 8-12 Years Of Experience At Bangalore

Adeptchips looking for Senior Physical Design Lead Engineer

EXP -8 -12 yrs

Job Description

• Responsible for ASIC physical implementation by using automatic place and route tools. Tasks include floor planning, power plan synthesis, clock tree synthesis, timing closure, routing, and post-route optimization
• Responsible for physical verification signoff including DRC, LVS and ESD.
• Responsible for cross-site communication and coordination among internal supporting groups
• Experience in Cadence Innovus or Synopsys ICC flow

Location: Bangalore.

If you are interested please send your CV to shivaranjini.mahesh@adeptchips.com